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(R)
74V1T07
SINGLE BUFFER (OPEN DRAIN)
s s
s
s s
s
HIGH SPEED: tPD = 4.7 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1 A (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUT OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V IMPROVED LATCH-UP IMMUNITY
S (SOT23-5L)
C (SC-70)
ORDER CODE: 74V1T07S 74V1T07C Power down protection is provided on input and 0 to 7V can be accepted on input with no regard to the supply voltage. This device can be used to interface 5V to 3V.
DESCRIPTION The 74V1T07 is an advanced high-speed CMOS SINGLE BUFFER (OPEN DRAIN) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output.
PIN CONNECTION AND IEC LOGIC SYMBOLS
October 1999
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74V1T07
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 1 2 4 3 5 SYMBOL N.C. 1A 1Y GND VCC NAME AND FUNCT ION Not Connected Data Input Data Output Ground (0V) Positive Supply Voltage
TRUTH TABLE
A L H
Z = High impedance
Y L Z
ABSOLUTE MAXIMUM RATINGS
Symbol VCC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 20 25 50 -65 to +150 260 Unit V V V mA mA mA mA
o o
ICC or IGND DC VCC or Ground Current
C C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VI VO Top dt/dv Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time (see note 3) (V CC = 5.0 0.5V) Parameter Valu e 4.5 to 5.5 0 to 5.5 0 to VCC -40 to +85 0 to 20 Unit V V V
o
C
ns/V
1)VIN from0.8V to 2 V
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74V1T07
DC SPECIFICATIONS
Symb ol Parameter T est Cond ition s V CC (V) VIH VIL VOL IOZ High Level Input Voltage Low Level Input Voltage Low Level Output Voltage High Impedance Output Leakage Current Input Leakage Current Quiescent Supply Current Additional Worst Case Supply Current 4.5 to 5.5 4.5 to 5.5 4.5 4.5 5.5 0 to 5.5 5.5 5.5 I O=50 A IO=8 mA VI = VIH or VIL VO = VCC or GND VI = 5.5V or GND VI = VCC or GND One Input at 3.4V, other input at VCC or GND 0.0 Min. 2 0.8 0.1 0.36 0.25 Typ . Value T A = 25 o C Max. -40 to 85 o C Min . 2 0.8 0.1 0.44 2.5 Max. V V Un it
V A
II ICC ICC
0.1 1 1.35
1.0 10 1.5
A A mA
AC ELECTRICAL CHARACTERISTICS (Input t r = tf =3 ns)
Symb ol Parameter Test Co ndition V CC (*) CL (V) (pF ) 5.0 5.0 15 50 Value o T A = 25 C Min. Typ . Max. 3.3 4.5 4.7 6.1 Un it -40 to 85 C Min . Max. 1.0 5.4 1.0 7.1
o
tPLZ tPZL
Propagation Delay Time
ns
(*) Voltage range is 5V 0.5V
CAPACITIVE CHARACTERISTICS
Symb ol Parameter T est Cond ition s Min. C IN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance (note 1) Typ . 4 5 9 Value T A = 25 o C Max. 10 -40 to 85 o C Min . Max. 10 pF pF pF Un it
1) CPD isdefined as the value of the IC'sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD * VCC * fIN + ICC
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74V1T07
TEST CIRCUIT
CL = 15/50 pF or equivalent (includes jig and probe capacitance) RL = R1 = 1K or equivalent RT = ZOUT of pulse generator (typically 50)
WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
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74V1T07
SOT23-5L MECHANICAL DATA
mm MIN. A A1 A2 b C D E E1 L e e1 0.90 0.00 0.90 0.35 0.09 2.80 2.60 1.50 0.35 0.95 1.9 TYP. MAX. 1.45 0.15 1.30 0.50 0.20 3.00 3.00 1.75 0.55 MIN. 35.4 0.0 35.4 13.7 3.5 110.2 102.3 59.0 13.7 37.4 74.8 mils TYP. MAX. 57.1 5.9 51.2 19.7 7.8 118.1 118.1 68.8 21.6
DIM.
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74V1T07
SC-70 MECHANICAL DATA
mm MIN. A A1 A2 b C D E E1 L e e1 0.80 0.00 0.80 0.15 0.10 1.80 1.80 1.15 0.10 0.65 1.3 TYP. MAX. 1.10 0.10 1.00 0.30 0.18 2.20 2.40 1.35 0.30 MIN. 31.5 0.0 31.5 5.9 3.9 70.9 70.9 45.3 3.9 25.6 51.2 mils TYP. MAX. 43.3 3.9 39.4 11.8 7.1 86.6 94.5 53.1 11.8
DIM.
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74V1T07
Information furnished is believed to be accurate and reliable. However, STMicroelectronic s assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems withoutexpress written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com .
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